In recent years, along with reduction of size and weight and enhancement for the function of electronic equipments, size reduction has been required also for semiconductor packaging devices mounted therein and small-sized package devices have been developed. Then, a semiconductor device of a size substantially equal with the chip size has been proposed. Japanese Patent Laid-Open No. 74807/1998 discloses a method of manufacturing such a semiconductor device and a schematic view thereof is shown in FIG. 12. A semiconductor chip 101 is mounted on one side of an interposer 100 (substrate) and connected with a wiring pattern 102 on the substrate. Further, the wirings are conducted through via holes 103 formed in the direction of the thickness of the substrate to a mounting substrate, and solder bumps 104 for external connection are formed to the via holes on the side of the mounting substrate.
In the semiconductor device of the constitution as described above, conduction between both surfaces of the interposer is taken by forming through holes and then filling a conductive material, for example, by plating. However, steps of forming fine through holes and applying plating therein results in a technical difficulty in that it requires application of a relatively thick plating; however, this creates a problem of increasing the cost.
This invention intends to solve the subject described above and it is a subject thereof to provide an interposer-forming clad plate for use in a semiconductor device capable of being manufactured at a reduced cost and having favorable characteristics, an interposer for use in a semiconductor device using the same and a manufacturing method of them.